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| author | Catalin Marinas <catalin.marinas@arm.com> | 2014-01-16 18:32:25 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2014-01-16 18:32:25 +0000 |
| commit | 4ce00dfcf19c473f3dbf23d5b1372639f0c334f6 (patch) | |
| tree | 9467821cdd4ab8b935297e02680b3f3d6e9a1333 /arch/arm64 | |
| parent | cdc27c27843248ae7eb0df5fc261dd004eaa5670 (diff) | |
| download | linux-4ce00dfcf19c473f3dbf23d5b1372639f0c334f6.tar.gz | |
Revert "arm64: Fix memory shareability attribute for ioremap_wc/cache"
This reverts commit 2f7dc6027522499582a520807cb9ffda589de47e. The above commit breaks the mapping type for Device memory because pgprot_default already contains a Normal memory type. pgprot_default is also not initialised early enough for earlyprintk resulting in an inconsistent memory mapping with 64K PAGE_SIZE configuration. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Will Deacon <will.deacon@arm.com> Acked-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/include/asm/io.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 572769727227..4cc813eddacb 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -229,7 +229,7 @@ extern void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot extern void __iounmap(volatile void __iomem *addr); extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size); -#define PROT_DEFAULT (pgprot_default | PTE_DIRTY) +#define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_DIRTY) #define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE)) #define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC)) #define PROT_NORMAL (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL)) |