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| author | Kristina Martsenko <kristina.martsenko@arm.com> | 2017-12-13 17:07:21 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2017-12-22 17:37:18 +0000 |
| commit | 75387b92635e7dca410c1ef92cfe510019248f76 (patch) | |
| tree | d3e2a0a1caee5599f1c53527a5671fd978da42a1 /arch/arm64/kernel/head.S | |
| parent | 193383043f14a398393dc18bae8380f7fe665ec3 (diff) | |
| download | linux-75387b92635e7dca410c1ef92cfe510019248f76.tar.gz | |
arm64: handle 52-bit physical addresses in page table entries
The top 4 bits of a 52-bit physical address are positioned at bits 12..15 of a page table entry. Introduce macros to convert between a physical address and its placement in a table entry, and change all macros/functions that access PTEs to use them. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Tested-by: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Bob Picco <bob.picco@oracle.com> Reviewed-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com> [catalin.marinas@arm.com: some long lines wrapped] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/head.S')
| -rw-r--r-- | arch/arm64/kernel/head.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index bb06223691ba..eeec0001e204 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -161,7 +161,7 @@ ENDPROC(preserve_boot_args) * supporting this configuration with 64K pages. */ orr \pte, \phys, \phys, lsr #36 - and \pte, \pte, #PTE_ADDR_MASK_52 + and \pte, \pte, #PTE_ADDR_MASK #else mov \pte, \phys #endif |