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| author | Pratyush Yadav <p.yadav@ti.com> | 2021-03-05 21:09:24 +0530 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2021-03-11 08:12:45 -0600 |
| commit | 4c20ee99dd1a36ab89c6a8c51ed25e9328d8a8cc (patch) | |
| tree | 4d599a022bbb28103056b878266815c5736d995d /arch/arm64/boot/dts/ti | |
| parent | eb8f6194e8074d7b00642dd75cf04d13e1b218e4 (diff) | |
| download | linux-4c20ee99dd1a36ab89c6a8c51ed25e9328d8a8cc.tar.gz | |
arm64: dts: ti: k3-j721e-som-p0: Enable 8D-8D-8D mode on OSPI
Set the Tx bus width to 8 so 8D-8D-8D mode can be selected. Change the frequency to 25 MHz. This is the frequency that the flash has been successfully tested with in Octal DTR mode. The total performance should still increase since 8D-8D-8D mode should be at least twice as fast as 1S-1S-8S mode. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20210305153926.3479-2-p.yadav@ti.com
Diffstat (limited to 'arch/arm64/boot/dts/ti')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi index 57720e6a04c5..2fee2906183d 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi @@ -174,9 +174,9 @@ flash@0{ compatible = "jedec,spi-nor"; reg = <0x0>; - spi-tx-bus-width = <1>; + spi-tx-bus-width = <8>; spi-rx-bus-width = <8>; - spi-max-frequency = <40000000>; + spi-max-frequency = <25000000>; cdns,tshsl-ns = <60>; cdns,tsd2d-ns = <60>; cdns,tchsh-ns = <60>; |