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author | Matt Fleming <matt.fleming@intel.com> | 2014-03-05 17:22:57 +0000 |
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committer | Matt Fleming <matt.fleming@intel.com> | 2014-03-05 17:31:41 +0000 |
commit | 4fd69331ad227a4d8de26592d017b73e00caca9f (patch) | |
tree | bfd95ed518ff0cb44318715432d321a92a7b9a0c /arch/arm/mm/proc-v6.S | |
parent | 69e608411473ac56358ef35277563982d0565381 (diff) | |
parent | 0ac09f9f8cd1fb028a48330edba6023d347d3cea (diff) | |
download | linux-4fd69331ad227a4d8de26592d017b73e00caca9f.tar.gz |
Merge remote-tracking branch 'tip/x86/urgent' into efi-for-mingo
Conflicts: arch/x86/include/asm/efi.h
Diffstat (limited to 'arch/arm/mm/proc-v6.S')
-rw-r--r-- | arch/arm/mm/proc-v6.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 45dc29f85d56..32b3558321c4 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -208,7 +208,6 @@ __v6_setup: mcr p15, 0, r0, c7, c14, 0 @ clean+invalidate D cache mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache mcr p15, 0, r0, c7, c15, 0 @ clean+invalidate cache - mcr p15, 0, r0, c7, c10, 4 @ drain write buffer #ifdef CONFIG_MMU mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs mcr p15, 0, r0, c2, c0, 2 @ TTB control register @@ -218,6 +217,8 @@ __v6_setup: ALT_UP(orr r8, r8, #TTB_FLAGS_UP) mcr p15, 0, r8, c2, c0, 1 @ load TTB1 #endif /* CONFIG_MMU */ + mcr p15, 0, r0, c7, c10, 4 @ drain write buffer and + @ complete invalidations adr r5, v6_crval ldmia r5, {r5, r6} ARM_BE8(orr r6, r6, #1 << 25) @ big-endian page tables |