diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-12-19 21:54:35 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-12-19 21:54:35 +0000 |
| commit | df0bcfe0f811a73077c06f75e440397e89ba58a4 (patch) | |
| tree | 0d59d32430f337acda23a18b2e0116a2b9dcd51f /arch/arm/mm/Kconfig | |
| parent | 215e83d971a04f04d191c7f702943412a19408fd (diff) | |
| parent | a2075a7aff5f469b91029c14f216dc169d1bd5f3 (diff) | |
| download | linux-df0bcfe0f811a73077c06f75e440397e89ba58a4.tar.gz | |
Merge branch 'arm/common-kconfig-refactor+for-rmk' of git://git.linaro.org/people/dmart/linux-2.6-arm into devel-stable
Diffstat (limited to 'arch/arm/mm/Kconfig')
| -rw-r--r-- | arch/arm/mm/Kconfig | 23 |
1 files changed, 16 insertions, 7 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 5cf7922ff5e7..4cefb57d9ed2 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -833,14 +833,23 @@ config CACHE_FEROCEON_L2_WRITETHROUGH Say Y here to use the Feroceon L2 cache in writethrough mode. Unless you specifically require this, say N for writeback mode. +config MIGHT_HAVE_CACHE_L2X0 + bool + help + This option should be selected by machines which have a L2x0 + or PL310 cache controller, but where its use is optional. + + The only effect of this option is to make CACHE_L2X0 and + related options available to the user for configuration. + + Boards or SoCs which always require the cache controller + support to be present should select CACHE_L2X0 directly + instead of this option, thus preventing the user from + inadvertently configuring a broken kernel. + config CACHE_L2X0 - bool "Enable the L2x0 outer cache controller" - depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \ - REALVIEW_EB_A9MP || ARCH_IMX_V6_V7 || MACH_REALVIEW_PBX || \ - ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \ - ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \ - ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK - default y + bool "Enable the L2x0 outer cache controller" if MIGHT_HAVE_CACHE_L2X0 + default MIGHT_HAVE_CACHE_L2X0 select OUTER_CACHE select OUTER_CACHE_SYNC help |