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| author | Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> | 2014-11-06 10:20:23 +0300 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2014-11-20 12:25:37 +0100 |
| commit | e6131fa3835483944c13d03bcff1d9103d9f53ce (patch) | |
| tree | 571f98cd1e2630db3e402754bd79692a149f0a05 /arch/arm/mach-sa1100 | |
| parent | 37f286e9085717c17a509fed977c0766244f80c9 (diff) | |
| download | linux-e6131fa3835483944c13d03bcff1d9103d9f53ce.tar.gz | |
ARM: debug: move StrongARM debug include to arch/arm/include/debug
StrongARM debug-macro.S is quite standalone thing, depending only on register mappings. Move it to proper place and add Kconfig entry. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-sa1100')
| -rw-r--r-- | arch/arm/mach-sa1100/include/mach/debug-macro.S | 62 |
1 files changed, 0 insertions, 62 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/debug-macro.S b/arch/arm/mach-sa1100/include/mach/debug-macro.S deleted file mode 100644 index 530772d937ad..000000000000 --- a/arch/arm/mach-sa1100/include/mach/debug-macro.S +++ /dev/null @@ -1,62 +0,0 @@ -/* arch/arm/mach-sa1100/include/mach/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ -#include <mach/hardware.h> - - .macro addruart, rp, rv, tmp - mrc p15, 0, \rp, c1, c0 - tst \rp, #1 @ MMU enabled? - moveq \rp, #0x80000000 @ physical base address - movne \rp, #0xf8000000 @ virtual address - - @ We probe for the active serial port here, coherently with - @ the comment in arch/arm/mach-sa1100/include/mach/uncompress.h. - @ We assume r1 can be clobbered. - - @ see if Ser3 is active - add \rp, \rp, #0x00050000 - ldr \rv, [\rp, #UTCR3] - tst \rv, #UTCR3_TXE - - @ if Ser3 is inactive, then try Ser1 - addeq \rp, \rp, #(0x00010000 - 0x00050000) - ldreq \rv, [\rp, #UTCR3] - tsteq \rv, #UTCR3_TXE - - @ if Ser1 is inactive, then try Ser2 - addeq \rp, \rp, #(0x00030000 - 0x00010000) - ldreq \rv, [\rp, #UTCR3] - tsteq \rv, #UTCR3_TXE - - @ clear top bits, and generate both phys and virt addresses - lsl \rp, \rp, #8 - lsr \rp, \rp, #8 - orr \rv, \rp, #0xf8000000 @ virtual - orr \rp, \rp, #0x80000000 @ physical - - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #UTDR] - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #UTSR1] - tst \rd, #UTSR1_TNF - beq 1001b - .endm - - .macro busyuart,rd,rx -1001: ldr \rd, [\rx, #UTSR1] - tst \rd, #UTSR1_TBY - bne 1001b - .endm |