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| author | Daniel Wolstenholme <daniel.e.wolstenholme@intel.com> | 2007-05-10 22:33:02 -0700 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-05-11 17:41:52 +0100 |
| commit | 2fd0237538480c8d704c385b6f9abc3f6c46b760 (patch) | |
| tree | 4f4052fb01ec00d4717bc7741602e02aa9833ef6 /arch/arm/mach-iop13xx/irq.c | |
| parent | 87b247c41674e29f90bf4938799ab079951ccc6b (diff) | |
| download | linux-2fd0237538480c8d704c385b6f9abc3f6c46b760.tar.gz | |
[ARM] iop13xx: msi support
Enable devices to signal interrupts via PCI memory cycles. rev6: * fix enable/disable typo, Michael Ellerman rev5: * fix up ack, enable, and disable for iop13xx_msi_chip rev4: * move smp compile fix to separate patch * use dynamic_irq_init in create_irq() * hookup mask/unmask routines in iop13xx_msi_chip rev3: * change msi.c to use linux/smp.h instead of asm/smp.h * call dynamic_irq_cleanup at destroy_irq time rev2: * destroy_irq did not take the full 128 bits of msi_irq_in_use into account * added missing '&' for calls to test_and_set_bit and clear_bit [ebiederm@xmission.com: review comments/suggestions] [dan.j.williams@intel.com: cleanups/forward port to 2.6-git] Signed-off-by: Daniel Wolstenholme <daniel.e.wolstenholme@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-iop13xx/irq.c')
| -rw-r--r-- | arch/arm/mach-iop13xx/irq.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c index b2eb0b961031..5791addd436b 100644 --- a/arch/arm/mach-iop13xx/irq.c +++ b/arch/arm/mach-iop13xx/irq.c @@ -26,6 +26,7 @@ #include <asm/hardware.h> #include <asm/mach-types.h> #include <asm/arch/irqs.h> +#include <asm/arch/msi.h> /* INTCTL0 CP6 R0 Page 4 */ @@ -258,7 +259,7 @@ void __init iop13xx_init_irq(void) write_intbase(INTBASE); write_intsize(INTSIZE_4); - for(i = 0; i < NR_IOP13XX_IRQS; i++) { + for(i = 0; i <= IRQ_IOP13XX_HPI; i++) { if (i < 32) set_irq_chip(i, &iop13xx_irqchip1); else if (i < 64) @@ -271,4 +272,6 @@ void __init iop13xx_init_irq(void) set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } + + iop13xx_msi_init(); } |