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| author | Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2014-09-25 17:59:41 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-10-21 00:06:36 +0900 |
| commit | c2dd114d24865662a6d7381b101741fc898a0059 (patch) | |
| tree | 2659e0dfd38f354d8fce88728f7b0812edbdebc1 /arch/arm/mach-exynos/pm.c | |
| parent | a135e20185fe6f0258fa6837455043f3063601d8 (diff) | |
| download | linux-c2dd114d24865662a6d7381b101741fc898a0059.tar.gz | |
ARM: EXYNOS: fix register setup for AFTR mode code
Add S5P_CENTRAL_SEQ_OPTION register setup to cpuidle AFTR mode code by moving the relevant code from exynos_pm_suspend() (used only by suspend) to exynos_pm_central_suspend() (used by both suspend and AFTR). Without this setup AFTR mode doesn't show any benefit over WFI one (at least on Exynos4412 SoC). When this setup is applied AFTR mode reduces power consumption by ~12% (as measured on Trats2 board). This change is a preparation for adding secure firmware support to EXYNOS cpuidle driver. Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/pm.c')
| -rw-r--r-- | arch/arm/mach-exynos/pm.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 6796fce923e2..16c5c3206f14 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -196,6 +196,10 @@ static void exynos_pm_central_suspend(void) tmp = pmu_raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION); tmp &= ~S5P_CENTRAL_LOWPWR_CFG; pmu_raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); + + /* Setting SEQ_OPTION register */ + pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0, + S5P_CENTRAL_SEQ_OPTION); } static int exynos_pm_central_resume(void) @@ -321,15 +325,8 @@ static void exynos_pm_prepare(void) static int exynos_pm_suspend(void) { - unsigned long tmp; - exynos_pm_central_suspend(); - /* Setting SEQ_OPTION register */ - - tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0); - pmu_raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION); - if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) exynos_cpu_save_register(); |