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| author | Catalin Marinas <catalin.marinas@arm.com> | 2009-05-18 16:26:27 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-05-28 13:52:05 +0100 |
| commit | af73110d23fb54f940197d93a410e9fa0cee66e2 (patch) | |
| tree | 29e1e92000e8933937432bc818ed42101eff8a2d /arch/arm/kernel/smp_scu.c | |
| parent | 4c5158d4c3ab1f2927a740372a0ee9c3fed7ba47 (diff) | |
| download | linux-af73110d23fb54f940197d93a410e9fa0cee66e2.tar.gz | |
[ARM] 5516/1: Flush the D-cache after initialising the SCU
On MP systems, the data loaded by CPU0 before the SCU was initialised may not be visible to the other CPUs. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> This also includes the following compile fix: This patch includes 'asm/cacheflush.h' which is needed to use 'flush_cache_all()' function. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/smp_scu.c')
| -rw-r--r-- | arch/arm/kernel/smp_scu.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c index 7f24ee9d7330..d3831f616ee9 100644 --- a/arch/arm/kernel/smp_scu.c +++ b/arch/arm/kernel/smp_scu.c @@ -12,6 +12,7 @@ #include <linux/io.h> #include <asm/smp_scu.h> +#include <asm/cacheflush.h> #define SCU_CTRL 0x00 #define SCU_CONFIG 0x04 @@ -38,4 +39,10 @@ void __init scu_enable(void __iomem *scu_base) scu_ctrl = __raw_readl(scu_base + SCU_CTRL); scu_ctrl |= 1; __raw_writel(scu_ctrl, scu_base + SCU_CTRL); + + /* + * Ensure that the data accessed by CPU0 before the SCU was + * initialised is visible to the other CPUs. + */ + flush_cache_all(); } |