summary refs log tree commit diff
path: root/arch/arm/boot
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2020-07-24 21:42:56 +0200
committerArnd Bergmann <arnd@arndb.de>2020-07-24 21:42:57 +0200
commit4a775263fcdad67d2ad72e7abcd6172793ea8a29 (patch)
treee68a903778800371a8dc3690df682049aa5d5693 /arch/arm/boot
parent33c56edacd9f2ff72b669d026df9c9f1c6eb1142 (diff)
parent916a0edc43f03f86b13fbc9943e5dc936671ea6e (diff)
downloadlinux-4a775263fcdad67d2ad72e7abcd6172793ea8a29.tar.gz
Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dts: amlogic: updates for v5.9 (round 2)
- new board: WeTek Core2
- audio playback support on more boards
- add GPU DVFS

* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS
  arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS
  arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS
  arm64: dts: meson: add support for the WeTek Core 2
  dt-bindings: arm: amlogic: add support for the WeTek Core 2
  arm64: dts: meson: add audio playback to khadas-vim3l
  arm64: dts: meson: add audio playback to odroid-c4
  arm64: dts: meson: update spifc node name on Khadas VIM3/VIM3L
  ARM: dts: meson: Align L2 cache-controller nodename with dtschema
  arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency
  arm64: dts: meson: add missing gxl rng clock
  soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's

Link: https://lore.kernel.org/r/7h8sf8671u.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/meson.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi
index 464057989572..eadb0832bcfc 100644
--- a/arch/arm/boot/dts/meson.dtsi
+++ b/arch/arm/boot/dts/meson.dtsi
@@ -11,7 +11,7 @@
 	#size-cells = <1>;
 	interrupt-parent = <&gic>;
 
-	L2: l2-cache-controller@c4200000 {
+	L2: cache-controller@c4200000 {
 		compatible = "arm,pl310-cache";
 		reg = <0xc4200000 0x1000>;
 		cache-unified;