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| author | Dmitry Osipenko <digetx@gmail.com> | 2019-06-23 20:07:24 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2019-10-29 20:29:15 +0100 |
| commit | cdc233fb0383b92a9f5eb1e73b31a773373e31ed (patch) | |
| tree | 067021281e6c5cb8b1cd904dcf83b93bf9a0c409 /arch/arm/boot/dts/tegra30.dtsi | |
| parent | a4563f5bf10b816cc1428a2a8b81412068d02434 (diff) | |
| download | linux-cdc233fb0383b92a9f5eb1e73b31a773373e31ed.tar.gz | |
ARM: tegra: Connect SMMU with Video Decoder Engine on Tegra30
Enable IOMMU support for the video decoder. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra30.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/tegra30.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index e074258d4518..e38ce88c3133 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -422,6 +422,7 @@ clocks = <&tegra_car TEGRA30_CLK_VDE>; reset-names = "vde", "mc"; resets = <&tegra_car 61>, <&mc TEGRA30_MC_RESET_VDE>; + iommus = <&mc TEGRA_SWGROUP_VDE>; }; apbmisc@70000800 { |