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| author | Pratyush Anand <pratyush.anand@st.com> | 2014-09-03 10:50:49 +0530 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-09-22 14:19:30 -0600 |
| commit | 65aaae245a2842e3ed9d12f27aeb42fa215dfc2c (patch) | |
| tree | 3cbbc777711c8cced032639cc9d37e13a7deee8c /arch/arm/boot/dts/spear1340.dtsi | |
| parent | 52addcf9d6669fa439387610bc65c92fa0980cef (diff) | |
| download | linux-65aaae245a2842e3ed9d12f27aeb42fa215dfc2c.tar.gz | |
PCI: spear: Pass config resource through reg property
PCIe configuration space should be passed through reg property, rather than through ranges property. This patch does the correction for SPEAr13XX SOCs. Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Mohit Kumar <mohit.kumar@st.com>
Diffstat (limited to 'arch/arm/boot/dts/spear1340.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/spear1340.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi index e71df0f2cb52..13e1aa33daa2 100644 --- a/arch/arm/boot/dts/spear1340.dtsi +++ b/arch/arm/boot/dts/spear1340.dtsi @@ -50,7 +50,8 @@ pcie0: pcie@b1000000 { compatible = "st,spear1340-pcie", "snps,dw-pcie"; - reg = <0xb1000000 0x4000>; + reg = <0xb1000000 0x4000>, <0x80000000 0x20000>; + reg-names = "dbi", "config"; interrupts = <0 68 0x4>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 0 68 0x4>; @@ -60,8 +61,7 @@ #address-cells = <3>; #size-cells = <2>; device_type = "pci"; - ranges = <0x00000800 0 0x80000000 0x80000000 0 0x00020000 /* configuration space */ - 0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */ + ranges = <0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */ status = "disabled"; }; |