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| author | Vineet Gupta <vgupta@synopsys.com> | 2014-09-10 19:05:38 +0530 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2015-06-22 14:06:56 +0530 |
| commit | 82fea5a1bbbe8c3b56d5f3efbf8880c7b25b1758 (patch) | |
| tree | 736061a26f019af1912dd6824f8ab4eb5a20eb33 /arch/arc/Kconfig | |
| parent | 173eaafaed284fc95209902f68f011d01d1eda02 (diff) | |
| download | linux-82fea5a1bbbe8c3b56d5f3efbf8880c7b25b1758.tar.gz | |
ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et al
Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/Kconfig')
| -rw-r--r-- | arch/arc/Kconfig | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index f09e03a0d604..301525020af7 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -160,12 +160,12 @@ config CPU_BIG_ENDIAN Build kernel for Big Endian Mode of ARC CPU config SMP - bool "Symmetric Multi-Processing (Incomplete)" + bool "Symmetric Multi-Processing" default n + select ARC_HAS_COH_CACHES if ISA_ARCV2 + select ARC_MCIP if ISA_ARCV2 help - This enables support for systems with more than one CPU. If you have - a system with only one CPU, say N. If you have a system with more - than one CPU, say Y. + This enables support for systems with more than one CPU. if SMP @@ -175,13 +175,20 @@ config ARC_HAS_COH_CACHES config ARC_HAS_REENTRANT_IRQ_LV2 def_bool n -endif #SMP +config ARC_MCIP + bool "ARConnect Multicore IP (MCIP) Support " + depends on ISA_ARCV2 + help + This IP block enables SMP in ARC-HS38 cores. + It provides for cross-core interrupts, multi-core debug + hardware semaphores, shared memory,.... config NR_CPUS int "Maximum number of CPUs (2-4096)" range 2 4096 - depends on SMP - default "2" + default "4" + +endif #SMP menuconfig ARC_CACHE bool "Enable Cache Support" |