summary refs log tree commit diff
path: root/Documentation/memory-barriers.txt
diff options
context:
space:
mode:
authorChris Metcalf <cmetcalf@ezchip.com>2015-11-23 17:04:17 -0500
committerPaul E. McKenney <paulmck@linux.vnet.ibm.com>2015-12-05 12:34:54 -0800
commitf84cfbb0ff269b427a0db591e22ac6948c554ab4 (patch)
treea80a07771c60c0de8b62b306dc409356e2608617 /Documentation/memory-barriers.txt
parentc64c4b0f9a183e4c73abff848378afa6edf796c5 (diff)
downloadlinux-f84cfbb0ff269b427a0db591e22ac6948c554ab4.tar.gz
Documentation/memory-barriers.txt: Fix ACCESS_ONCE thinko
In commit 2ecf810121c7 ("Documentation/memory-barriers.txt: Add
needed ACCESS_ONCE() calls to memory-barriers.txt") the statement
"Q = P" was converted to "ACCESS_ONCE(Q) = P".  This should have
been "Q = ACCESS_ONCE(P)".  It later became "WRITE_ONCE(Q, P)".
This doesn't match the following text, which is "Q = LOAD P".
Change the statement to be "Q = READ_ONCE(P)".

Signed-off-by: Chris Metcalf <cmetcalf@ezchip.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Diffstat (limited to 'Documentation/memory-barriers.txt')
-rw-r--r--Documentation/memory-barriers.txt8
1 files changed, 4 insertions, 4 deletions
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index aef9487303d0..85304ebd187c 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -194,7 +194,7 @@ There are some minimal guarantees that may be expected of a CPU:
  (*) On any given CPU, dependent memory accesses will be issued in order, with
      respect to itself.  This means that for:
 
-	WRITE_ONCE(Q, P); smp_read_barrier_depends(); D = READ_ONCE(*Q);
+	Q = READ_ONCE(P); smp_read_barrier_depends(); D = READ_ONCE(*Q);
 
      the CPU will issue the following memory operations:
 
@@ -202,9 +202,9 @@ There are some minimal guarantees that may be expected of a CPU:
 
      and always in that order.  On most systems, smp_read_barrier_depends()
      does nothing, but it is required for DEC Alpha.  The READ_ONCE()
-     and WRITE_ONCE() are required to prevent compiler mischief.  Please
-     note that you should normally use something like rcu_dereference()
-     instead of open-coding smp_read_barrier_depends().
+     is required to prevent compiler mischief.  Please note that you
+     should normally use something like rcu_dereference() instead of
+     open-coding smp_read_barrier_depends().
 
  (*) Overlapping loads and stores within a particular CPU will appear to be
      ordered within that CPU.  This means that for: