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authorGregory CLEMENT <gregory.clement@bootlin.com>2018-03-07 16:40:10 +0100
committerVinod Koul <vinod.koul@intel.com>2018-03-11 20:33:27 +0530
commit3cd2c313f1d618f92d1294addc6c685c17065761 (patch)
tree7b3fe40e8e3c1567412def410f4841d115d374fc /Documentation/crc32.txt
parentd716d9b702bb759dd6fb50804f10a174bd156d71 (diff)
downloadlinux-3cd2c313f1d618f92d1294addc6c685c17065761.tar.gz
dmaengine: mv_xor_v2: Fix clock resource by adding a register clock
On the CP110 components which are present on the Armada 7K/8K SoC we need
to explicitly enable the clock for the registers. However it is not
needed for the AP8xx component, that's why this clock is optional.

With this patch both clock have now a name, but in order to be backward
compatible, the name of the first clock is not used. It allows to still
use this clock with a device tree using the old binding.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'Documentation/crc32.txt')
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