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author | Alexandru Ardelean <alexandru.ardelean@analog.com> | 2020-12-03 09:40:36 +0200 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2020-12-17 01:52:54 -0800 |
commit | ac1ee86a9cdb002b0c130cfbad668dd992a0596a (patch) | |
tree | b19551523d759db2df7a94393566e2d0cb401f22 /COPYING | |
parent | bd91abb218e0ac4a7402d6c25d383e2a706bb511 (diff) | |
download | linux-ac1ee86a9cdb002b0c130cfbad668dd992a0596a.tar.gz |
clk: axi-clkgen: wrap limits in a struct and keep copy on the state object
Up until the these limits were global/hard-coded, since they are typically limits of the fabric. However, since this is an FPGA generated clock, this may run on setups where one clock is on a fabric, and another one synthesized on another fabric connected via PCIe (or some other inter-connect, and then these limits need to be adjusted for each instance of the AXI CLKGEN. This change wraps the current constants in 'axi_clkgen_limits' struct and the 'axi_clkgen' instance keeps a copy of these limits, which is initialized at probe from the default limits. The limits are stored on the device-tree OF table, so that we can adjust them via the compatible string. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20201203074037.26940-1-alexandru.ardelean@analog.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'COPYING')
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