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authorSinan Kaya <okaya@codeaurora.org>2017-07-16 10:30:38 -0400
committerVinod Koul <vinod.koul@intel.com>2017-07-19 09:38:55 +0530
commit8e7341750b95b3732ba19e65745edbcb46ee6241 (patch)
treebc8d02031f7823a8d2f70449fbc6679ca77f57e2
parent0217cccdbfb71bfa9482c323a380cedebcd96e41 (diff)
downloadlinux-8e7341750b95b3732ba19e65745edbcb46ee6241.tar.gz
dmaengine: qcom_hidma: correct channel QOS register offset
A regression was found while testing QOS with different channels.
The QOS register offset is 0x700 rather than 0x300.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-rw-r--r--drivers/dma/qcom/hidma_mgmt.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/dma/qcom/hidma_mgmt.c b/drivers/dma/qcom/hidma_mgmt.c
index d51cd34c8267..c45e244b2d99 100644
--- a/drivers/dma/qcom/hidma_mgmt.c
+++ b/drivers/dma/qcom/hidma_mgmt.c
@@ -28,7 +28,7 @@
 
 #include "hidma_mgmt.h"
 
-#define HIDMA_QOS_N_OFFSET		0x300
+#define HIDMA_QOS_N_OFFSET		0x700
 #define HIDMA_CFG_OFFSET		0x400
 #define HIDMA_MAX_BUS_REQ_LEN_OFFSET	0x41C
 #define HIDMA_MAX_XACTIONS_OFFSET	0x420