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| author | John Crispin <blogic@openwrt.org> | 2013-04-12 06:27:41 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-08 01:19:11 +0200 |
| commit | 9d50094dfec829a1361e595d5d09dfa0f2fe5057 (patch) | |
| tree | 3e40020fce3dd498f22dafed528b7dc9e05918c7 | |
| parent | 6fbfe90e58b03c4126e3f21d9d9cc53c116003b2 (diff) | |
| download | linux-9d50094dfec829a1361e595d5d09dfa0f2fe5057.tar.gz | |
DT: MIPS: ralink: add MT7620A dts files
Add a dtsi file for MT7620A SoC and a sample dts file. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: http://patchwork.linux-mips.org/patch/5190/
| -rw-r--r-- | arch/mips/ralink/Kconfig | 4 | ||||
| -rw-r--r-- | arch/mips/ralink/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/mips/ralink/dts/mt7620a.dtsi | 58 | ||||
| -rw-r--r-- | arch/mips/ralink/dts/mt7620a_eval.dts | 16 |
4 files changed, 79 insertions, 0 deletions
diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig index 493411f5cd75..026e823d871d 100644 --- a/arch/mips/ralink/Kconfig +++ b/arch/mips/ralink/Kconfig @@ -46,6 +46,10 @@ choice bool "RT3883 eval kit" depends on SOC_RT3883 + config DTB_MT7620A_EVAL + bool "MT7620A eval kit" + depends on SOC_MT7620 + endchoice endif diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile index 040a986de32c..18194fa93e80 100644 --- a/arch/mips/ralink/dts/Makefile +++ b/arch/mips/ralink/dts/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o +obj-$(CONFIG_DTB_MT7620A_EVAL) := mt7620a_eval.dtb.o diff --git a/arch/mips/ralink/dts/mt7620a.dtsi b/arch/mips/ralink/dts/mt7620a.dtsi new file mode 100644 index 000000000000..08bf24fefe9f --- /dev/null +++ b/arch/mips/ralink/dts/mt7620a.dtsi @@ -0,0 +1,58 @@ +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "ralink,mtk7620a-soc"; + + cpus { + cpu@0 { + compatible = "mips,mips24KEc"; + }; + }; + + cpuintc: cpuintc@0 { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "mti,cpu-interrupt-controller"; + }; + + palmbus@10000000 { + compatible = "palmbus"; + reg = <0x10000000 0x200000>; + ranges = <0x0 0x10000000 0x1FFFFF>; + + #address-cells = <1>; + #size-cells = <1>; + + sysc@0 { + compatible = "ralink,mt7620a-sysc"; + reg = <0x0 0x100>; + }; + + intc: intc@200 { + compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc"; + reg = <0x200 0x100>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpuintc>; + interrupts = <2>; + }; + + memc@300 { + compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc"; + reg = <0x300 0x100>; + }; + + uartlite@c00 { + compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; + reg = <0xc00 0x100>; + + interrupt-parent = <&intc>; + interrupts = <12>; + + reg-shift = <2>; + }; + }; +}; diff --git a/arch/mips/ralink/dts/mt7620a_eval.dts b/arch/mips/ralink/dts/mt7620a_eval.dts new file mode 100644 index 000000000000..35eb874ab7f1 --- /dev/null +++ b/arch/mips/ralink/dts/mt7620a_eval.dts @@ -0,0 +1,16 @@ +/dts-v1/; + +/include/ "mt7620a.dtsi" + +/ { + compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc"; + model = "Ralink MT7620A evaluation board"; + + memory@0 { + reg = <0x0 0x2000000>; + }; + + chosen { + bootargs = "console=ttyS0,57600"; + }; +}; |