diff options
| author | Graham Sider <Graham.Sider@amd.com> | 2023-05-17 12:03:45 -0400 |
|---|---|---|
| committer | Linux Infrastructure <z1.linuxinfra@amd.com> | 2023-05-17 17:38:12 -0400 |
| commit | 7f78f63e1a2add8b69d978d7296705c561fe420a (patch) | |
| tree | 93870620d61022d72f4fe47b08d1b70300c3025d | |
| parent | 72b841650b93fa4582565f846bea529d8704ebc5 (diff) | |
| download | linux-7f78f63e1a2add8b69d978d7296705c561fe420a.tar.gz | |
drm/amdgpu: disable extra gfx943 legacy flush on rev1+
The extra legacy TLB flush mitigation is only required on rev0. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Acked-by: Alex Deucher <Alexander.Deucher@amd.com> Reviewed-by: Philip Yang <Philip.Yang@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index d559e7bc0f09..f70e666cecf2 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c @@ -834,11 +834,8 @@ static void gmc_v9_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, inv_req = gmc_v9_0_get_invalidate_req(vmid, 2); inv_req2 = gmc_v9_0_get_invalidate_req(vmid, flush_type); } else if (flush_type == 2 && - adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 3)) { - /* FIXME: Temporarily add a legacy flush (type 0) before heavyweight - * flush for gfx943 to mitigate a bug which causes CPC UTCL1 to return - * stale translations even after TLB heavyweight flush. - */ + adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 3) && + adev->rev_id == 0) { inv_req = gmc_v9_0_get_invalidate_req(vmid, 0); inv_req2 = gmc_v9_0_get_invalidate_req(vmid, flush_type); } else { @@ -985,11 +982,9 @@ static int gmc_v9_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev, kiq->pmf->kiq_invalidate_tlbs(ring, pasid, 2, all_hub); - /* FIXME: Temporarily add a legacy flush (type 0) before heavyweight - * flush for gfx943 to mitigate a bug which causes CPC UTCL1 to return - * stale translations even after TLB heavyweight flush. - */ - if (flush_type == 2 && adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 3)) + if (flush_type == 2 && + adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 3) && + adev->rev_id == 0) kiq->pmf->kiq_invalidate_tlbs(ring, pasid, 0, all_hub); |