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| author | Shay Agroskin <shayag@mellanox.com> | 2018-09-30 09:58:08 +0300 |
|---|---|---|
| committer | Saeed Mahameed <saeedm@mellanox.com> | 2018-10-18 13:32:36 -0700 |
| commit | 67daf1186086ad4b2ec09b8078b835936977d06a (patch) | |
| tree | ff53fc579a93060e56ac30500a964e5187431d2f | |
| parent | 6cfa94605091b65cb2895a826750a30fbed99770 (diff) | |
| download | linux-67daf1186086ad4b2ec09b8078b835936977d06a.tar.gz | |
net/mlx5: Added "per_lane_error_counters" cap bit to PCAM
Added "Per lane raw errors" capability bit in Ports Capabilities Mask (PCAM) enhanced features layout. This bit determines if the fields "phy_raw_errors_laneX" in "Physical Layer statistical" counters group are supported. Signed-off-by: Shay Agroskin <shayag@mellanox.com> Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 47b09a742ae5..dbff9ff28f2c 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -8140,7 +8140,8 @@ struct mlx5_ifc_pcam_enhanced_features_bits { u8 rx_icrc_encapsulated_counter[0x1]; u8 reserved_at_6e[0x8]; u8 pfcc_mask[0x1]; - u8 reserved_at_77[0x4]; + u8 reserved_at_77[0x3]; + u8 per_lane_error_counters[0x1]; u8 rx_buffer_fullness_counters[0x1]; u8 ptys_connector_type[0x1]; u8 reserved_at_7d[0x1]; |