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| author | Jisheng Zhang <jszhang@marvell.com> | 2015-12-15 22:25:27 +0800 |
|---|---|---|
| committer | Wim Van Sebroeck <wim@iguana.be> | 2015-12-27 21:04:50 +0100 |
| commit | 3024e0d13b0f34536f94bf0d7cc11443beeee9c5 (patch) | |
| tree | ac821866889cf44a9e06917322331995c9af775b | |
| parent | 5889f06bd31d542766046faa6b17d957c08e1484 (diff) | |
| download | linux-3024e0d13b0f34536f94bf0d7cc11443beeee9c5.tar.gz | |
watchdog: dw_wdt: fix signedness bug in dw_wdt_top_in_seconds()
On 64bit platforms, "(1 << (16 + top)) / clk_get_rate(dw_wdt.clk)" is sign-extended to 64bit then converted to unsigned 64bit, finally divide the clk rate. If the top is the maximum TOP i.e 15, "(1 << (16 +15))" will be sign-extended to 0xffffffff80000000, then converted to unsigned 0xffffffff80000000, which is a huge number, thus the final result is wrong. We fix this issue by giving usigned value(1U in this case) at first. Let's assume clk rate is 25MHZ, Before the patch: dw_wdt_top_in_seconds(15) = -864612050 After the patch: dw_wdt_top_in_seconds(15) = 85 Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
| -rw-r--r-- | drivers/watchdog/dw_wdt.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c index 6ea0634345e9..8fefa4ad46d4 100644 --- a/drivers/watchdog/dw_wdt.c +++ b/drivers/watchdog/dw_wdt.c @@ -81,7 +81,7 @@ static inline int dw_wdt_top_in_seconds(unsigned top) * There are 16 possible timeout values in 0..15 where the number of * cycles is 2 ^ (16 + i) and the watchdog counts down. */ - return (1 << (16 + top)) / clk_get_rate(dw_wdt.clk); + return (1U << (16 + top)) / clk_get_rate(dw_wdt.clk); } static int dw_wdt_get_top(void) |