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| author | Mythri P K <mythripk@ti.com> | 2011-09-08 19:06:22 +0530 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-09-30 16:16:32 +0300 |
| commit | 7c1f1ecac9240663db357ae0f30761a7ee7c8463 (patch) | |
| tree | 8ac7ef8bd45a7bc1d7df521406be4536d3d85f99 | |
| parent | 94c52987d293ec2aeb75993a3e33b7c36159668c (diff) | |
| download | linux-7c1f1ecac9240663db357ae0f30761a7ee7c8463.tar.gz | |
OMAP4: DSS2: HDMI: Move the EDID definition from HDMI
Clean up to move the EDID definition from the IP dependent header file to hdmi.c Signed-off-by: Mythri P K <mythripk@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| -rw-r--r-- | drivers/video/omap2/dss/hdmi.c | 10 | ||||
| -rw-r--r-- | drivers/video/omap2/dss/hdmi.h | 10 |
2 files changed, 10 insertions, 10 deletions
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c index bf76c87024b2..96a0ac941126 100644 --- a/drivers/video/omap2/dss/hdmi.c +++ b/drivers/video/omap2/dss/hdmi.c @@ -50,6 +50,16 @@ #define HDMI_PLLCTRL 0x200 #define HDMI_PHY 0x300 +/* HDMI EDID Length move this */ +#define HDMI_EDID_MAX_LENGTH 256 +#define EDID_TIMING_DESCRIPTOR_SIZE 0x12 +#define EDID_DESCRIPTOR_BLOCK0_ADDRESS 0x36 +#define EDID_DESCRIPTOR_BLOCK1_ADDRESS 0x80 +#define EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR 4 +#define EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR 4 + +#define OMAP_HDMI_TIMINGS_NB 34 + static struct { struct mutex lock; struct omap_display_platform_data *pdata; diff --git a/drivers/video/omap2/dss/hdmi.h b/drivers/video/omap2/dss/hdmi.h index cb50f6a3ad09..2d4a22eca9c6 100644 --- a/drivers/video/omap2/dss/hdmi.h +++ b/drivers/video/omap2/dss/hdmi.h @@ -182,16 +182,6 @@ struct hdmi_reg { u16 idx; }; #define HDMI_TXPHY_POWER_CTRL HDMI_REG(0x8) #define HDMI_TXPHY_PAD_CFG_CTRL HDMI_REG(0xC) -/* HDMI EDID Length */ -#define HDMI_EDID_MAX_LENGTH 256 -#define EDID_TIMING_DESCRIPTOR_SIZE 0x12 -#define EDID_DESCRIPTOR_BLOCK0_ADDRESS 0x36 -#define EDID_DESCRIPTOR_BLOCK1_ADDRESS 0x80 -#define EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR 4 -#define EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR 4 - -#define OMAP_HDMI_TIMINGS_NB 34 - #define REG_FLD_MOD(base, idx, val, start, end) \ hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\ val, start, end)) |