summary refs log tree commit diff
diff options
context:
space:
mode:
authorRobin Murphy <robin.murphy@arm.com>2021-06-14 15:57:26 +0100
committerJoerg Roedel <jroedel@suse.de>2021-06-17 17:03:46 +0200
commit531353e650db087e61ce84f8e6b7e0982c1dc1b0 (patch)
treed74d2237a37ebcf65c20cba8141932442463399c
parente86b041ffeff554c9458882ebabc2aba5c864186 (diff)
downloadlinux-531353e650db087e61ce84f8e6b7e0982c1dc1b0.tar.gz
iommu: Update "iommu.strict" documentation
Consolidating the flush queue logic also meant that the "iommu.strict"
option started taking effect on x86 as well. Make sure we document that.

Fixes: a250c23f15c2 ("iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE")
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: John Garry <john.garry@huawei.com>
Link: https://lore.kernel.org/r/2c8c06e1b449d6b060c5bf9ad3b403cd142f405d.1623682646.git.robin.murphy@arm.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
-rw-r--r--Documentation/admin-guide/kernel-parameters.txt6
1 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index cb89dbdedc46..20a32de990ed 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -1987,7 +1987,7 @@
 			  forcing Dual Address Cycle for PCI cards supporting
 			  greater than 32-bit addressing.
 
-	iommu.strict=	[ARM64] Configure TLB invalidation behaviour
+	iommu.strict=	[ARM64, X86] Configure TLB invalidation behaviour
 			Format: { "0" | "1" }
 			0 - Lazy mode.
 			  Request that DMA unmap operations use deferred
@@ -1998,6 +1998,10 @@
 			1 - Strict mode (default).
 			  DMA unmap operations invalidate IOMMU hardware TLBs
 			  synchronously.
+			Note: on x86, the default behaviour depends on the
+			equivalent driver-specific parameters, but a strict
+			mode explicitly specified by either method takes
+			precedence.
 
 	iommu.passthrough=
 			[ARM64, X86] Configure DMA to bypass the IOMMU by default.