diff options
| author | chenhui zhao <chenhui.zhao@freescale.com> | 2015-12-24 08:39:57 +0800 |
|---|---|---|
| committer | Scott Wood <oss@buserror.net> | 2016-03-04 23:44:02 -0600 |
| commit | ebb9d30a6a74f4ced5b7d35446ebb6362a724393 (patch) | |
| tree | 2efd7b3e75538b5550e273116adbba546fb859f4 | |
| parent | d64716caf7724dbacd6d79249b90973bf6a9852a (diff) | |
| download | linux-ebb9d30a6a74f4ced5b7d35446ebb6362a724393.tar.gz | |
powerpc/mm: any thread in one core can be the first to setup TLB1
On e6500, in the case of cpu hotplug, either thread in one core may be the first thread initilzing the TLB1. The subsequent threads must not setup it again. The code is derived from the comment of Scott Wood. Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> Signed-off-by: Scott Wood <oss@buserror.net>
| -rw-r--r-- | arch/powerpc/include/asm/cputhreads.h | 8 | ||||
| -rw-r--r-- | arch/powerpc/mm/tlb_nohash.c | 4 |
2 files changed, 9 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/cputhreads.h b/arch/powerpc/include/asm/cputhreads.h index ba42e46ea58e..ea9623147b87 100644 --- a/arch/powerpc/include/asm/cputhreads.h +++ b/arch/powerpc/include/asm/cputhreads.h @@ -94,6 +94,14 @@ static inline int cpu_last_thread_sibling(int cpu) return cpu | (threads_per_core - 1); } +static inline u32 get_tensr(void) +{ +#ifdef CONFIG_BOOKE + if (cpu_has_feature(CPU_FTR_SMT)) + return mfspr(SPRN_TENSR); +#endif + return 1; +} #endif /* _ASM_POWERPC_CPUTHREADS_H */ diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c index bb04e4df3100..f4668488512c 100644 --- a/arch/powerpc/mm/tlb_nohash.c +++ b/arch/powerpc/mm/tlb_nohash.c @@ -640,9 +640,7 @@ static void early_init_this_mmu(void) * transient mapping would cause problems. */ #ifdef CONFIG_SMP - if (cpu != boot_cpuid && - (cpu != cpu_first_thread_sibling(cpu) || - cpu == cpu_first_thread_sibling(boot_cpuid))) + if (hweight32(get_tensr()) > 1) map = false; #endif |